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Digital Logic Gates Summary

There are three basic types of digital logic gates, the AND Gate, the OR Gate and the NOT Gate

We have also seen that each gate has an opposite or complementary form of itself in the form of the NAND Gate, the NOR Gate and the Buffer respectively, and that any of these individual gates can be connected together to form more complex Combinational Logic circuits.

We have also seen, that in digital electronics both the NAND gate and the NOR gate can both be classed as “Universal” gates as they can be used to construct any other gate type. In fact, any combinational circuit can be constructed using only two or three input NAND or NOR gates. We also saw that NOT gates and Buffers are single input devices that can also have a Tri-state High-impedance output which can be used to control the flow of data onto a common data bus wire.

Digital Logic Gates can be made from discrete components such as ResistorsTransistors and Diodes to form RTL (resistor-transistor logic) or DTL (diode-transistor logic) circuits, but today’s modern digital 74xxx series integrated circuits are manufactured using TTL (transistor-transistor logic) based on NPN bipolar transistor technology or the much faster and low power CMOS based MOSFET transistor logic used in the 74Cxxx, 74HCxxx, 74ACxxx and the 4000 series logic chips.

The eight most “standard” individual Digital Logic Gates are summarised below along with their corresponding truth tables.

Standard Logic Gates

The Logic AND Gate

SymbolTruth Table
2-input logic AND gate

2-input AND Digital Logic Gate
BAQ
000
010
100
111
Boolean Expression Q = A.BRead as A AND B gives Q

The Logic OR Gate

SymbolTruth Table
2-input or digital logic gatesBAQ
000
011
101
111
Boolean Expression Q = A + BRead as A OR B gives Q

Inverting Logic Gates

The Logic NAND Gate

SymbolTruth Table
2-input nand digital logic gatesBAQ
001
011
101
110
Boolean Expression Q = A . BRead as A AND B gives NOT Q

The Logic NOR Gate

SymbolTruth Table
2-input nor digital logic gatesBAQ
001
010
100
110
Boolean Expression Q = A + BRead as A OR B gives NOT Q

Exclusive Logic Gates

The Logic Exclusive-OR Gate (Ex-OR)

SymbolTruth Table
exclusive-or gateBAQ
000
011
101
110
Boolean Expression Q = A ⊕ BRead as A OR B but not BOTH gives Q (odd)

The Logic Exclusive-NOR Gate (Ex-NOR)

SymbolTruth Table
exclusive-nor gateBAQ
001
010
100
111
Boolean Expression Q = A ⊕ BRead if A AND B the SAME gives Q (even)

Single Input Logic Gates

The Hex Buffer

SymbolTruth Table
digital logic gate bufferAQ
00
11
Boolean Expression Q = ARead as A gives Q

The NOT gate (Inverter)

SymbolTruth Table
digital logic gateAQ
01
10
Boolean Expression Q = not A or ARead as inverse of
A gives Q

The operation of the above Digital Logic Gates and their Boolean expressions can be summarised into a single truth table as shown below. This truth table shows the relationship between each output of the main digital logic gates for each possible input combination.

Digital Logic Gate Truth Table Summary

The following logic gates truth table compares the logical functions of the 2-input logic gates detailed above.

InputsTruth Table Outputs For Each Gate
BAANDNANDORNOREX-OREX-NOR
00010101
01011010
10011010
11101001
 
Truth Table Output for Single-input Gates
ANOTBuffer
010
101

Pull-up and Pull-down Resistors

One final point to remember, when connecting together digital logic gates to produce logic circuits, any “unused” inputs to the gates must be connected directly to either a logic level “1” or a logic level “0” by means of a suitable “Pull-up” or “Pull-down” resistor ( for example 1kΩ resistor ) to produce a fixed logic signal. This will prevent the unused input to the gate from “floating” about and producing false switching of the gate and circuit.

pull up and pull down resistors

As well as using pull-up or pull-down resistors to prevent unused logic gates from floating about, spare inputs to gates and latches can also be connected together or connected to left-over or spare gates within a single IC package as shown.

unused logic gates inputs

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